Timer/Counter Continuous Mode. Podstawy techniki mikroprocesorowej ETEW006 Układy czasowo licznikowe (CTC) C51 Timers - Timer/Counter Gating Control

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1 Timer/Couner Coninuous Mode Podsawy echniki mikroprocesorowej ETEW6 Układy czasowo licznikowe (CTC) Andrzej Sępień Kaedra Merologii Elekronicznej i Foonicznej Timer/Couner repeaedly couns up o ValueMax and resars from zero: ValueMax = FFh for 8-bi ValueMax = FFFFh for 6-bi Timer ValueMax = FFFF FFFFh for 32-bi Timer CLK N Divider TimerCLK or N-bi Timer/Couner /K Couner Selec Timer/Couner Gaing Conrol C5 Timers - Overview CLK Selec Timer CLK Gae Timer CLK Gae Divider /K Couner N or N-bi Timer/Couner TimerCLK wo 6-bi imers/couners (Timer and ) which are useful in many applicaions for iming and couning. Timer/couner and of he C5 and can be used in he same four operaing modes: Mode : 8-bi imer/couner wih a divide-by-32 prescaler Mode : 6-bi imer/couner Mode 2: 8-bi imer/couner wih 8-bi auo-reload Mode 3: Timer/couner is configured as one 8-bi imer/couner and one 8-bi imer; Timer/couner in his mode holds is coun. Exernal inpus INT and INT can be programmed o funcion as a gae for imer/ couners and o faciliae pulse widh measuremens. C5 Timers T, T - Mode P3.5 T P3.3 INT# C/T# f OSC 2 TL 8 bi TMOD (addr = 89h) TR TH 8 bi TF GATE GATE C/T# M= M= EA ET EAL TL (addr=8bh) TH (addr=8dh) GATE C/T# M= M= INTR Bh Zliczanie impulsów S4 S5 S6 S S2 S3 S4 P P2 P P2 P P2 P P2 P P2 P P2 P P2 zewnęrzne wejście licznika T lub T T C cykl maszynowy S5 S6 S P P2 P P2 P P2 S2 S3 S4 P P2 P P2 P P2 INC rejesru licznika IE / IEN (addr = A8h) EA EAL TCON (addr = 88h) ET ET TF TR TF TR Zliczenie zewnęrznego impulsu na wejściu licznika T lub T: > T C i f X < f OSC /24

2 Rejesry liczników T i T Liczniki w 89LPC93x Philips Bh A8h Ah 98h 9h 88h 8h P3 IE / IEN P2 SCON P TCON TMOD TL TL TH TH P SBUF rejesry licznika T SFR SP DPL DPH PCON Brak możliwości zapisu zmiennych ypu ineger do rejesrów liczników T lub T rejesry licznika T Tn P.2 (T) P.7 (T) INTn# C/T# PCLK Toggle TLn 8 bi Mode (and, 2, 3) TRn THn 8 bi TFn GATEn AUXR (addr = A2h, Rese: xb) CLKPL EBRR ENT ENT ENTn ETn EA SRST - DPS f oscillaor PCLK = 2 DIVM Inerrup ATmega8 8-bi Timer/Couner TCNT Daa Bus coun Inerrup TOV Conrol Logic max clk T Timer/Couner sopped r.. /24 Edge Deecor inernal clk Timer/Couner Conrol Regiser pin T ATmega8 8-bi Timer/Couner coun Inerrup clk T TOV TCNT clk T = clkconrol I/O / Logic Daa Bus clk T Timer/Couner sopped Edge Deecor pin T TCNT MAX- MAXr BOTTOM inernal BOTTOM+.. /24 clk TOV max No Prescaling Timer/Couner Conrol Regiser couner is incremened a each imer clock (clk T ) couning direcion is always up (incremening), no couner clear is performed couner simply overruns when i passes is maximum 8-bi value (MAX = xff) and hen resars from he boom (BOTTOM = x) Timer/Couner Flag (TOV): will be se in he same imer clock cycle as he TCNT becomes zero TOV Flag behaves like a ninh bi, excep ha i is only se, no cleared imer overflow inerrup ha auomaically clears he TOV flag new couner value can be wrien anyime couner is incremened clk a T each imer clock (clk T ) couning direcion is always up (incremening), no couner clear is performed couner simply clk overruns T = clk I/O /8 when i passes is maximum 8-bi value (MAX = xff) and hen resars from he boom (BOTTOM = x) TCNT MAX- MAX BOTTOM BOTTOM+ Timer/Couner Flag (TOV): will be se in he same TOVimer clock cycle as he TCNT becomes zero TOV Flag behaves like a ninh bi, excep ha i is only se, wih no r cleared imer overflow inerrup ha auomaically clears he TOV flag new couner value can be wrien anyime C5 san licznika wpisywana warość do licznika : x czas rwania insrukcji: MOV addr, #dana ; 2 cykle maszynowe TR ; cykl maszynowy MOV TMOD, # ; ryb (6-biowy) obu liczników MOV TL, #LOW SanPoczT ; SanPoczT: MOV TH,#HIGH SanPoczT ; FDh FEh SETB TR MOV TL, # MOV TH,# TR ; san Sop: ; licznika T: 3h 3h MOV TL, #LOW SanPoczT MOV TH,#HIGH SanPoczT SETB TR MOV TH,# MOV TL, # TR ; san Sop2: ; licznika T: 2h h Wpis/odczy synchroniczny programowy wpis synchroniczny: zarzymanie licznika na czas wpisu koreka wpisywanej warości o czas wpisu, zarzymania, uruchomienia licznika wpis części mniej znaczącej wpis części bardziej znaczącej ponowne uruchomienie licznika 2

3 ATmega8 Timer/Couner Accessing 6-bi Regisers ATmega8(L). 8-bi AVR wih 8K Byes In-Sysem Programmable Flash. Amel Co. 2486T AVR 5/8, p.79 unsigned in i;... TCNT = xff; /* Se TCNT o xff */... i = TCNT; /* Read TCNT ino i */... Wrie: ; Se TCNT o xff LDI R7, x LDI R6, xff OUT TCNTH, R7 ; TempReg R7, high bye firs OUT TCNTL, R6 ; TCNTL R6, low bye second ; TCNTH TempReg Read: ; Read TCNT ino R7:R6 IN R6, TCNTL ; TempReg TCNTH, low bye firs IN R7, TCNTH ; R7 TempReg, high bye second ST7 Timer/Couner Accessing 6-bi Regisers Wrie 6-bi Timer Regiser: wriing he couner LSBye reses he imer a FFFCh Read 6-bi Timer Regiser: read MSB firs and hen he LSBye couner LSBye is buffered during he MSBye read, bye value is buffered auomaically buffered value remains unchanged unil he 6-bi read sequence is compleed, even if he user reads he MSBye several imes Timer/Couner Capure Mode ST7 6-bi Timer - Overview read Timer/Couner value in he fly CLK N Divider TimerCLK or N-bi Timer/Couner /K Selec Couner signal wrie o Regiser rising edge falling edge N-bi Capure Regiser Capure Selec The imer consiss of a 6-bi free-running couner driven by a programmable prescaler. I may be used for a variey of purposes, including measuring he pulse lenghs of up o wo inpu signals (inpu capure) or generaing up o wo oupu waveforms (oupu compare and PWM). Pulse lenghs and waveform periods can be modulaed from a few microseconds o several milliseconds using he imer prescaler and he CPU clock prescaler Some ST7 devices have wo on-chip 6-bi imers. They are compleely independen, and do no share any resources. They are synchronized afer a MCU rese as long as he imer clock frequencies are no modified This descripion covers one or wo 6-bi imers. In ST7 devices wih wo imers, regiser names are prefixed wih TA (Timer A) or TB (Timer B) ST7 6-bi Timer - Main Feaures Programmable prescaler: f CPU divided by 2, 4 or 8. saus flag and maskable inerrup Exernal clock inpu (mus be a leas 4 imes slower han he CPU clock speed) wih he choice of acive edge Oupu compare funcions wih: 2 dedicaed 6-bi regisers 2 dedicaed programmable signals 2 dedicaed saus flags dedicaed maskable inerrup Inpu capure funcions wih: 2 dedicaed 6-bi regisers 2 dedicaed acive edge selecion signals 2 dedicaed saus flags dedicaed maskable inerrup Pulse Widh Modulaion mode (PWM) One Pulse mode alernae funcions on I/O pors: ICAP, ICAP2, OCMP, OCMP2, EXTCLK C55C: Timer 2 - Block Diagram 6-Bi Comparaor CCL3/ /CCH3 6-Bi Comparaor CCL2/ /CCH2 6-Bi Comparaor CCL/ /CCH Reload Reload Timer 2 TL2 TH2 6-Bi Comparaor CRCL/ /CRCH Capure TF2 Infineon C55C 3

4 C57A Capure C57A Capure - example f IN Timer T2 TF2 Inr wrie o CCL4 wrie o CCL3.. wrie o CRCL f OSC 2 Timer T2 INT4 INT3# INT4 Regiser CC4 Mode Mode Regiser CCn Regiser CRC U() P. CC INT3# CRC Mode INT3# IEX3 Inerrup Hisory U() T Inr P.4 CC4 Inr P.-3 CC-3 Inr P. CC P. CC INT4 CC INT4 IEX4 Timer/Couner Reload Mode wrie Timer/Couner value when overflow CLK N Divider TimerCLK or N-bi Timer/Couner /K Selec Couner N-bi Reload Regiser P3.4 T P3.2 INT# C5 Timers T, T - Mode 2 C/T# f OSC 2 TR TMOD (addr = 89h) IE / IEN (addr = A8h) EA ET EAL ET TL 8 bi TH 8 bi GATE GATE C/T# M= M= TF TCON (addr = 88h) TF TR TF TR EA ET EAL GATE C/T# M= M= TL (addr=8ah) TH (addr=8ch) INTR Bh C57A: Tryb Reload Timer/Couner Mode compare Timer/Couner conens wih Regiser f WE Licznik T2 przepełnienie TF2 N-bi Comparaor Regiser Mode Mode Rejesr CRC CRC - warość począkowa licznika T2 P.5 T2EX CLK N Divider Timer CLK or N-bi Timer/Couner /K Selec Couner N-bi Comparaor EU 4

5 C57A: Tryb C57A: Tryb f WE Licznik T2 TF2 INTR (2Bh) przepełnienie licznika T2 TF2 INTR (2Bh) czyaj przerzunik Komparaor CC4 Rejesr CC4 Komparaor CC3 Komparaor CC2 Komparaor CC Komparaor CRC Rejesr CC3 Rejesr CC2 Rejesr CC Rejesr CRC IEX6 (6Bh) IEX5 (63h) IEX2 (4Bh) IEX4 (5Bh) IEX3 (53h) f WE Licznik T2 magisrala Komparaor CCn Rejesr CCn san równości czyaj pin wybranego rejesru CCn ze sanem licznika T2 R D CLK S Vcc GND P./CC P./CC P.2/CC2 P.3/CC3 P.4/CC4 C57A: Tryb (przykład /2) san T2 CC CRC P./CC = FFFFh + przepełnienie licznika T2 T = = 5 np. 5 = FECh współczynnik wypełnienia np. = FC8h okres PWM C57A: Tryb (przykład 2/2) ; generaor sygnału: okres = ms, współczynnik wypełnienia = /2 Wypelnienie EU 5 ; współczynnik wypełnienia = /2 Okres EU ; okres sygnału = µs = ms San_T2 EU Okres ; = FC8h, warość począkowa T2 San_CRC EU San_T2 ; warość począkowa T2 po auoładowaniu San_CC EU Wypelnienie ; = FECh, san porównania w CC San_CCEN EU b ; odblokowany ryb porównania dla CC SanT2CON EU b ; ryb akowania licznika T2 + auoładowanie Generaor_kHz: MOV TH2, # High San_T2 ; warość począkowa licznika T2 MOV TL2, # Low San_T2 MOV CRCH, # High San_CRC ; warość rejesru CRC, począek zliczania MOV CRCL, # Low San_CRC MOH, # High San_CC ; warość rejesru porównania CC MOL, # Low San_CC MOEN, # San_CCEN ; ryb porównania licznika T2 MOV T2CON, # San_T2CON ; sar licznika T2 Koniec_programowania: ; licznik generuje sygnał aż do ponownego NOP ; programowania lub zerowania procesora Programmable Couner Array - Feaures (/2) The PCA consiss of a : dedicaed 6-bi couner/imer five 6-bi capure/compare modules each capure/compare module has is own associaed I/O line (CEXn) I/O lines are roued hrough he Crossbar o Por I/O when enabled. PCA - Feaures (2/2) SYSCLK/2 SYSCLK/4 T SYSCLK Ex /8 PCA CLOCK MUX 6-Bi Couner/Timer Each capure/compare module may be configured o operae independenly in one of six modes: Edge-Triggered Capure Sofware Timer, High-Speed Oupu, Frequency Oupu, 8-Bi PWM 6-Bi PWM The PCA is configured and conrolled hrough he sysem conroller's Special Funcion Regisers (SFR). max rae = SYSCLK/4 Capure Module Capure Module Capure Module 2 Capure Module 3 Capure Module 4 WDT ECI CEX CEX CEX2 CEX3 CEX4 Crossbar Por I/O 5

6 C57A: Tryb C57A: Mode - przykład (/2) Synchroniczne generowanie kilku sygnałów z wykorzysaniem rejesru CC4 wzorcowych sygnałów binarnych serowanie wielofazowych silników skokowych serowanie cewek układów zapłonowych f IN Timer T2 Inernal bus Comparaor CC3 - Regiser CC3 - D CLK Shadow Lach read lach D CLK GND read pin Vcc P./CC P./CC P.2/CC2 P.3/CC3.. i inne.. P5.7 P5.6 P5.5 P5.4 P5.3 P5.2 P5. P5. san poru P5 po kolejnej ms: ms A6h 6Ah 65h 4ms 99h 95h 6ms 8ms 5Ah 56h AAh A5h ms 69h A6h 6Ah 65h 99h 95h 5Ah 56h AAh A5h C57A: Mode - przykład (2/2) 8-biowa ablica wzorców 6-biowa ablica czasów - sanu sanu poru P5 wpisywanych rejesru CC4; komparaor CC4 do przerzunika pomocniczego przepisuje san przerzunika (Shadow Lach) poru P5 pomocniczego do przerzunika wyjściowego poru P5 P5.7 P5.6 P5.5 P5.4 P5.3 P5.2 P5. P5. ms san A6h poru P5: 6Ah 65h 4ms 6ms 8ms 99h 95h 5Ah 56h AAh A5h Pulse Widh Modulaion (/2) modulacja szerokości impulsu warość średnia napięcia: U() U() U śr = / T po uśrednieniu T U() Pulse Widh Modulaion (2/2) C57A: Tryb U() T warość średnia napięcia: U śr = / T generaor sygnału U() /2 Generowanie sygnału sinusoidalnego: U() 28 warości chwilowe do CC2 i U( i ) = sin ( ) 6 i =,,.., 5 por P np. P.2/CC2: + filr U( i ): dolnoprzepusowy okres do CRC 6

7 Changing he Ampliude wihou using any Muliplicaion Insrucion (/2) AP822 Generaing sinusoidal 3-Phase-Currens for Inducion Maschines wih a imeopimezed algorihm for he Capure Uni. C54 / C58 Microconrollers. Feb. 24, Infineon Technologies AG U = A sin B B corresponds o he angle variable high bye sin B corresponds o he value in he sine able o be muliplied wih he ampliude A U corresponds o he value moved o he compare regiser To avoid he muliplicaion, following equaion shows a soluion: U = A sin B = cos(arccos A) sin B = = cos A' sin B = ½ [sin(b - A) + sin(b + A')] Changing he Ampliude wihou using any Muliplicaion Insrucion (2/2) sin X + sin X = 2 sin X sin X + sin(x+8 ) = The muliplicaion of A and sinb is now ransfered wih an addiion heorem ino he operaions B-A and B+A and wo sine able accesses. Three-Phase Sine Wave Currens for Inducion Moors (/4) Three-Phase Sine Wave Currens for Inducion Moors (2/4) Programmable Period Value Programmable Value Zero *CCx Pin *COUTx Pin * (x =,, 2) Programmable Offse Value (for Dead-Time) Programmable Dead-Time High Side Gaing Signal Low Side Gaing Signal Three-Phase Sine Wave Currens for Inducion Moors (3/4) Three-Phase Sine Wave Currens for Inducion Moors (4/4) Programmable Period Value Channel Value Channel Value Channel 2 Value Zero Phase A High Side Phase A Low Side Phase B High Side Phase B Low Side Phase C High Side Phase C Low Side CC COUT CC COUT CC2 COUT2 6-Bi Timer The hos PC sends he desired ampliude A and frequency o he MCU The compare values canno be compued by he microconroller in a reasonable ime, herefore he values are periodically read ou from a sine able in memory which means, ha he compare values are 8-bi. 7